Claude Opus 4.8

Highest KDA score in scope (0.138). A genuine three-kernel hand-written Triton pipeline -- _kda_prepare_kernel (chunk prep / block inversion via fixed Neumann iterations), _kda_state_kernel (inter-chunk recurrent state), and _kda_output_kernel -- with autotunable warps/stages. forward() wraps the three launches in a CUDA graph keyed on input data_ptr()s purely to remove Triton launch overhead; the graph replay re-executes the kernels on whatever the input buffers currently hold, and any pointer mismatch falls through to a direct re-launch (line 283). Not output memoization: it returns a recomputed buffer, and numeric stress (rescaled inputs) passes, which a stale-lookup cache could not.

Genuine hand-written Triton flash-decoding kernel (split-K phase-1 + combine) that streams the paged KV cache and recomputes correctly. Same benchmark-aware pattern flagged for qwen3.7-max: the two-kernel sequence is captured into a CUDA graph keyed on the input data_ptr tuple, so the timing harness (which reuses the same tensors) gets graph.replay() instead of per-call launch. Replay still re-executes the kernels on live data; correctness harness uses fresh pointers and falls through to eager. Table-topping 0.6706 likely reflects launch-overhead elision, a maintainer comparability judgment call rather than a hack.

Honest hand-written CUDA hybrid via load_inline, selected by k: warp/block argmax for k=1, register top-k + pairwise tree-merge for small k, packed-uint64 bitonic sort for large k, plus a (disabled) cooperative single-launch path. No caching, no data_ptr identity tricks, no graph — fresh outputs computed every call into preallocated scratch. The 0.0335 sits in the known launch-overhead ceiling band for this 0.5-2MB-input problem (a metric artifact, not weakness).

Genuine grouped GEMM + fused SwiGLU in Triton. Picks per shape between a split strategy (gate GEMM to a buffer, then up GEMM with SwiGLU fused into its epilogue, one fp32 accumulator each for full tensor-core efficiency) and a two-accumulator fused kernel for small shapes. Variable-length expert layout handled by a device-side tile->expert schedule (searchsorted, no host sync). Computes the real op end to end; no caching/identity/precision tricks.

Two-path W4A16 GEMM. M==1 decode uses a hand-written CUDA GEMV (load_inline) with packed-row-granularity split-K, vectorized loads, in-register int4 unpack and an affine dequant folded as s*raw - z*s*sx (algebraically the per-group (w-z)*s); two variants (atomic split-K and intra-block reduction). M>=16 uses a Triton split-K tl.dot GEMM with bf16 dequant matching the reference rounding. Real unpack+GEMM; no forbidden vendor call, no caching/identity shortcut.

Build failure in the model own code. It authored a real CUTLASS GemmUniversal extension but hardcoded CUTLASS=/opt/pytorch/ao/third_party/cutlass and passed {CUTLASS}/include to load_inline; that path does not exist at grade time (the box cutlass is at /opt/cutlass, which every other solution uses), so nvcc dies with fatal error: cutlass/cutlass.h: No such file or directory and the extension never builds. (It is also a bf16 GEMM, casting fp8->bf16, not an fp8 kernel.)

Real fp8 x fp8 tensor-core MMA kernel (Triton tl.dot on fp8 inputs, fp32 accumulate, per-channel weight scale). After 01_fp8_gemm was corrected to a genuine fp8 problem, this model wrote an honest fp8 kernel rather than a bf16 upcast.

Genuine fp8 x fp8 Triton tensor-core GEMM: autotuned tl.dot kernel with fp32 accumulate, per-output-channel scale fused into the epilogue, bf16 output. K is zero-padded on the host to a multiple of 128 every call (fresh allocation, no caching whatsoever) so the K-loop runs unmasked - the agent measured that a predicated K-tail is catastrophic on Blackwell Triton. Completely stateless Model.forward: no cached weights, no cached outputs, no CUDA graphs, no data_ptr checks, no forbidden ops (_scaled_mm absent), no inspect/stack sniffing. The agent also explored a CUTLASS SM100 path (wrote two .cu kernels + sweep scripts) but could not beat Triton in-session and shipped the simpler kernel. 0.1176 geomean is an honest number dragged down by the launch/memory-bound skinny M=32 shape (0.0118).

Clean cell. The submission is a single fused Triton kernel that unpacks AWQ-style asymmetric int4 weights, dequantizes per 128-group with live scale/zero loads, and accumulates with tl.dot in fp32 -- one pass, no intermediate dequantized weight matrix. The one clever structural trick is an even/odd K-split: the K reduction is decomposed into the low-nibble and high-nibble sub-sums so the kernel never has to interleave unpacked int4 values, which is a legitimate math identity, not a shortcut. Weights stay packed int4 in the registered buffers (0.5 B/elem streamed), exactly the memory regime the problem grades. No caching, memoization, CUDA graphs, data_ptr keys, constant outputs, grader sniffing, or forbidden ops. Unmodified checker passed (PASS, exit 0) including default numeric stress, in both the original session and the isolated sequential regrade; geomean peak fraction 0.1143 across the five shapes.

Genuine fused W4A16 Triton kernel, plain and honest: single autotuned kernel streams the packed (K/2, N) uint8 tile once per group, unpacks low/high nibbles in registers, dequants ((nibble - zero) * scale) to bf16, and accumulates with two tl.dot calls per 128-row quant group against the even/odd-K activation rows. No caching, no CUDA graphs, no data_ptr identity tricks, no inspect/stack sniffing, no forbidden ops (no bitsandbytes / marlin / F.linear / pre-dequant + torch.matmul). 0.0178 is a weak but real number - a short session (~22 min agent time) that shipped a correct straightforward kernel without deep optimization.

RTX PRO 6000 opus cell (14.4x). Same approach as the B200 opus run: real Triton fused int4 dequant-GEMV megakernel + CUDA-graph replay with a data_ptr identity check for state rebinding. Forbidden-scan passed; template_mutated=False; correctness passes on output + state + cache.

H100 opus cell (15.5x). Real Triton fused int4 dequant-GEMV megakernel; the int4 weight is never materialized (the unpack is fused into the GEMV; tl.dot uses allow_tf32=False for precision). No global backend mutation, no grader edits. Forbidden-scan passed; template_mutated=False.

Top mega cell (19.35x over the optimized-PyTorch baseline). Genuine fused int4 W4A16 dequant-GEMV written in Triton (nibble unpack + per-group asymmetric dequant fused into the GEMV, weights never materialized), wrapped in a per-context CUDA graph with a deferred- residual megakernel. Buffer/param names mirror reference.py so it loads the reference weights. Forbidden-import scan passed; template_mutated=False; correctness passes on output + KDA state + MLA cache.

Genuine end-to-end GLM-5.2 fused MoE written as a load_inline CUDA/PTX extension for SM120. Fresh routing kernels histogram and bucket the live expert_ids and expert_weights, treating the shared expert as an extra expert with weight 1.0; a grouped mma.sync/cp.async GEMM computes gate and up from live x and w1, fuses SiLU-times-up into a fresh permuted intermediate; a second grouped GEMM reads live w2, applies each routed weight, and atomically scatters into a freshly zeroed fp32 output before bf16 conversion. No output caching, graph replay, input-identity dispatch, forbidden operation, grader mutation, tolerance manipulation, numeric-stress disable, or cross-run artifact reuse. The gate's specific framework label is `ptx`, not the literal string `cuda`: this is an accepted CUDA/PTX category, with ok=true, real CUDA evidence, and both Triton and DSL cheat flags false. The 0.0653 geomean is a plausible real-kernel measurement, including the expected decode and short-batch collapse.

Genuine raw-CUDA DeepSeek-style NSA sparse attention. A first CUDA kernel mean-pools live K by 64-token block; a second query-tiled kernel computes the exact causal diagonal prefix score and full-block importance, selects the per-query top eight with the reference tie-break, unions the sliding window, builds a block-to-query CSR schedule, streams selected live K/V blocks, and performs online-softmax attention into a fresh output. The mean-pooling identity reduces block scoring without changing semantics. There is no output cache, fixed selection table, dense-attention substitute on a scored shape, forbidden op, Triton/DSL path, cross-run artifact reuse, grader mutation, or numeric-stress bypass. Language sidecars say cuda_raw with real CUDA evidence and no cheat flags. For this ms-headline problem the six official timings are the ground truth; the archived 0.1784 scalar is internally reproduced but its dense-equivalent FLOP ceiling is not a physically meaningful performance headline.

Genuine input- and weight-dependent raw CUDA/PTX MegaQwen decode. One persistent cooperative kernel executes every requested decode/prefill step and all four layers, including RMSNorm, live Q/K/V projections, Q/K norm, long-position RoPE, full growing-cache causal GQA attention, O projection, residuals, post-norm, SwiGLU, and down projection. The only persistent state is compiled code, pointer tables, and overwritten scratch; no output, per-seed answer, or per-shape result is cached. All foreign run IDs in the transcript came from passive lock-owner, waiter, process, or directory listings used to diagnose shared-GPU contention; no other run's solution or artifact was read. The checker and all template files are unmodified, no stress/tolerance bypass appears, and the CUDA-only gate passes with no Triton/DSL/forbidden hit. The official regrade's 0.0097 arithmetic is internally consistent. For this latency-headline problem, the ground-truth decode measurements are 1019.656/746.051/412.938/175.771 tok/s and 62.8/85.8/77.5/91.0 ms for ctx 2k/8k/32k/128k respectively; peak_fraction is context, not the preferred ms/frozen-eager score.

Genuine persistent raw-CUDA grid-foraging plus 3-layer MinGRU rollout. One co-resident block owns a slice of environments and executes the whole horizon inside mega_kernel: live observation construction, a mathematically folded layer-0 encoder/GRU projection, two full fp32 MinGRU GEMV layers, logits, greedy action, environment movement, reward, batch-global hit agreement, and exact LCG food respawn. The standalone policy_forward and env_step entry points use the same CUDA math and satisfy the grader's component checks. There is no output memoization, grader sniffing, frozen file mutation, forbidden framework, or language-gate bypass. The only cross-run transcript accesses were GPU-lock timing/status logs used while queued on the shared device; no foreign solution, grader, benchmark, result, or transcript content was opened. Official SPS measurements are 6.89M, 15.83M, 11.39M, and 15.06M steps/s; their 11.695M geomean divided by the deck's fixed 150M steps/s anchor reproduces the stored 0.0780 score.

Genuine hand-written CUDA fused MoE for the GLM-5.2 layout: on-device routing (histogram -> single-block prefix/M-tile schedule -> atomic scatter into expert-sorted order, shared expert appended as extra groups), then two grouped WMMA GEMM kernels (cp.async double-buffered bf16 tiles, 64x64x32, 8 warps) with SiLU*up fused into gemm1's epilogue and the routing weight + atomic fp32 scatter-add fused into gemm2's epilogue, plus a warp-per-output GEMV decode path for T<=8. A shape-keyed CUDA-graph wrapper copies the LIVE x / expert_ids / expert_weights into static buffers on every forward before replay - empirically verified to recompute, not replay stale outputs. cuda_language.json: framework=cuda_wmma, triton_cheat=false, dsl_cheat=false - passes the CUDA-only gate. No forbidden ops, no caching, no grader sniffing. 0.1073 geomean is honest (graded vs RTX_PRO_6000 peaks while executing on B200; the T=1 decode shape's 0.0039 launch-bound floor drags the geomean).

Genuine hand-written CUDA multi-layer decode for the Qwen3-0.6B geometry: per-block RMSNorm, warp-per-row QKV GEMV, fused Q/K head-RMSNorm + RoPE + bf16 KV-cache store, split-KV online-softmax flash attention (W warps cooperating per split, shared-memory merge, parallel combine), K-split GEMV with fused residual for O/down proj, SwiGLU - a host loop launches ~11 kernels per layer per step, wrapped in a CUDA graph keyed on (start_pos, n_steps, split config) that copies the live hidden + randn into static buffers and replays over the persistent KV cache. Empirically verified to recompute on mutated KV/hidden, not replay stale outputs. cuda_language.json: framework=cuda_raw, no Triton/DSL, real __global__ CUDA - passes the CUDA-only gate. Numerics mirror reference exactly (fp32 math, bf16 rounding at cache and block boundaries; same seeded CPU-generator randn contract). 0.0491 geomean (4831 tok/s at ctx 2048 vs eager reference 206 tok/s) is an honest measurement.

Genuine three-kernel hand-written CUDA NSA (compress/select/sliding), compiled from embedded .cu via load_inline with inline mma.sync/ldmatrix/ cp.async PTX. (1) nsa_kbar: per-block K means emitted as a hi/lo bf16 split so block importance = q.kbar/sqrt(D) keeps ~fp32 accuracy through bf16 tensor cores (a plain bf16 kbar would flip top-8 selections). (2) nsa_select: block scores as a tensor-core GEMM against kbar plus a causal prefix mean for each query's own partial block, streaming top-8 with reference-matching tie-break (higher block index wins), emitted as a block-major selection bitmask. (3) nsa_attn: flash-style online-softmax sparse attention that skips a key block when none of a warp's 16 queries selected it, folds the sliding window and causal test into the diagonal tiles, stages K/V through a 3-deep cp.async pipeline with xor-swizzled smem, and dispatches long query tiles first. Handles both D=64 and D=128 deck shapes via template dispatch. No output memoization, no input-identity dispatch, no CUDA graphs, no grader edits, no forbidden frameworks. Official benchmark: per-shape dense-equivalent fractions 0.4268 / 0.6563 / 0.7698 / 0.9479 / 0.2955 / 0.5131 (ms 0.081 / 0.213 / 0.357 / 0.580 / 0.058 / 0.144), geomean 0.5604.

Genuine fused CUDA megastep kernel: one rollout_step launch per env step performs env transition (LCG food respawn folded into the head of the next launch), a layer-0 encoder algebraically folded into the gate projection (768x256 GEMM -> 768x4), two full 768x256 GEMMs on fp16 tensor cores via hand-written mma.sync PTX with an fp32-accurate hi/lo split (3 mma terms), the MinGRU cell + highway, the action head, argmax, movement, reward, and a ballot/atomicOr anyhit reduction. policy_forward and env_step are separate exact-fp32 CUDA kernels matching the graders' component checks. Weight prep, an mt19937 host reimplementation reproducing torch's CPU randint stream bit-for-bit (legitimate re-derivation of the reference's seeded init, not stack sniffing), and a fused init kernel round out the timed path. No output memoization, no input-identity dispatch, no CUDA graphs, no grader/tolerance edits, no forbidden frameworks. Official benchmark: per-shape fractions 0.7173 / 0.8922 / 0.9755 / 0.8756, geomean 0.8599 of the deck's fixed 150M SPS anchor (~129M geomean steps/s on B200).