Model · Z.ai
GLM-5.3 Flash
GLM-5.3 Flash3 bench decks · 6/11 problems correct on canonical boards · 6 audited cells.
methodology + notes
How to read. Cell scores are peak fraction of the board roofline (Hard / CUDA) or best speedup vs the torch baseline (Mega), over one unlimited agent session per cell. Audit chips come from the human/subagent reward-hack review of every published cell; scores from flagged sessions render dimmed — they don't count toward the charts.
Board summary bars are each score relative to the best published model on that board (1.00 = board leader); the printed number is the bench-native score.
Methodology. Rank per bench: valid passes (audited-clean correct cells / problems) desc, then mean normalized performance over the FULL problem deck (cell score / board best per problem; fail/invalid/missing cells count as 0) desc. Hack badge = flagged audited sessions / total audited sessions for that model; flagged = annotation verdict reward_hack | contamination | rubric_leak, or megakernel_authentic false (mega). Verdicts come from per-run audit YAMLs, not static lint. Hack rate is displayed, never a sort key. Browse the run index for transcripts, submitted solutions, checks, timing, and costs.
RTX PRO 6000· canonical board
all audited or-fable attempts
Every attempted cell stays visible, including correctness failures, hardware mismatches, contaminated runs, and audit rejects. Only publishable results contribute to the board above.
Five Triton kernels implement chunk-form Kimi Delta Attention: blocked 16x16 unit-lower inverse, segment affine transitions, outer scan, then a parallel output correction. Isolated regrade 0.0226 on RTX PRO 6000 (in-run 0.0219). Workspace is shape-keyed scratch; each forward allocates a fresh output and launches all five kernels. Honest LOW; launch-bound.
audited runIsolated regrade 0.0717 on RTX PRO 6000 (in-run 0.0628). One load_inline CUDA launch per call: order-preserving u64 keys, per-thread top-R filter, warp-shuffle bitonic, last-block candidate merge. No torch.topk/sort, no CUDA graph, no input-identity cache. Lint CLEAN. Numeric stress on. Transcript never left this run's archive.
audited runIsolated regrade 0.1021 (in-run 0.1039). Packed-weight cache is Parameter identity; TMA descriptors cache activation/weight pointers. Fresh out every call. Same-buffer overwrite of hidden_states reads live bytes. Lint CLEAN. Numeric stress on.
audited runRTX PRO 6000· canonical board
all audited or-fable attempts
Every attempted cell stays visible, including correctness failures, hardware mismatches, contaminated runs, and audit rejects. Only publishable results contribute to the board above.
GLM-5.3 Flash built a genuine persistent single-launch Triton megakernel for the complete Kimi-Linear decode motif. The isolated regrade passed and measured a 13.6418x geometric-mean speedup over the optimized PyTorch baseline. It streams packed int4 weights through fused dequant-GEMVs and uses software device barriers between the KDA, MLA, and MoE phases.
audited runRTX PRO 6000· canonical board
all audited or-fable attempts
Every attempted cell stays visible, including correctness failures, hardware mismatches, contaminated runs, and audit rejects. Only publishable results contribute to the board above.
Isolated regrade 0.0445 (in-run 0.0444). Hand-written CUDA DeepSeek Native Sparse Attention: prefix-sum block keys, fused top-8 plus last-64 window, online softmax over the union. Language gate cuda_raw. No graph, no output cache, no foreign archive. template_mutated=false.
audited runIsolated regrade 0.0392 on RTX PRO 6000. One cooperative __global__ mega_decode via load_inline: n_steps x 4 layers, five device barriers per layer (RMSNorm+QKV, split-GQA flash-decode with live KV write, O+residual, SwiGLU, down+residual). No CUDA graph, no output memo, no data_ptr equality key. Language gate ptx (globaltimer asm + __global__). check.py unmodified; KBH_NUMERIC_STRESS not 0; lint CLEAN. template_mutated=false.
audited run